AO4402 20v n-channel mosfet general description product summary v ds i d (at v gs =4.5v) 20a r ds(on) (at v gs =4.5v) < 5.5m w r ds(on) (at v gs =2.5v) < 7m w 100% uis tested 100% r g tested symbol v ds v gs i dm i as , i ar e as , e ar t j , t stg symbol t 10s steady-state steady-state r q jl mj 2 t a =70c junction and storage temperature range -55 to 150 c v 12 gate-source voltage 16 units parameter typ max c/w r q ja 31 59 40 the AO4402 combines advanced trench mosfet technology with a low resistance package to provide extremely low r ds(on) . this device is ideal for load switch and battery protection applications. v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted 20v drain-source voltage 20 a 57 t a =25c t a =70c pulsed drain current c continuous drain current a i d 20 140 w 3.1 maximum junction-to-lead c/w c/w maximum junction-to-ambient a d 16 75 power dissipation b p d 24 maximum junction-to-ambient a t a =25c avalanche current c 162 avalanche energy l=0.1mh c thermal characteristics g ds soic-8 top view bottom view d d d d s s s g rev 1: nov 2010 www.aosmd.com page 1 of 6
AO4402 symbol min typ max units bv dss 20 v v ds =20v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 0.5 1 1.6 v i d(on) 140 a 4.6 5.5 t j =125c 5.8 7 5.5 7 m w g fs 105 s v sd 0.6 1 v i s 4 a c iss 3080 3860 4630 pf c oss 520 740 960 pf c rss 350 580 810 pf r g 0.6 1.4 2.1 w q g (4.5v) 28 36 43 nc q gs 7 9 11 nc q gd 7 12 17 nc t d(on) 7 ns t r 8 ns t d(off) 70 ns t f 18 ns t rr 13 17 20 ns q rr 29 36 43 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery charge i f =20a, di/dt=500a/ m s maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time turn-off delaytime v gs =10v, v ds =10v, r l =0.5 w , r gen =3 w gate resistance v gs =0v, v ds =0v, f=1mhz turn-off fall time total gate charge v gs =10v, v ds =10v, i d =20a gate source charge gate drain charge m w i s =1a,v gs =0v v ds =5v, i d =20a v gs =2.5v, i d =18a forward transconductance diode forward voltage r ds(on) static drain-source on-resistance i dss m a v ds =v gs i d =250 m a v ds =0v, v gs = 12v zero gate voltage drain current gate-body leakage current electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions body diode reverse recovery time drain-source breakdown voltage on state drain current i d =250 m a, v gs =0v v gs =10v, v ds =5v v gs =4.5v, i d =20a reverse transfer capacitance i f =20a, di/dt=500a/ m s v gs =0v, v ds =10v, f=1mhz switching parameters a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air enviro nment with t a =25c. the value in any given application depends on the user' s specific board design. b. the power dissipation p d is based on t j(max) =150c, using 10s junction-to-ambient thermal resistance. c. repetitive rating, pulse width limited by junct ion temperature t j(max) =150c. ratings are based on low frequency and duty cycles to keep initialt j =25c.maximum avalanche current limited by tester capability. d. the r q ja is the sum of the thermal impedence from junction to lead r q jl and lead to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-ambien t thermal impedence which is measured with the devi ce mounted on 1in 2 fr-4 board with 2oz. copper, assuming a maximum junction temperatur e of t j(max) =150c. the soa curve provides a single pulse ratin g. rev 1: nov 2010 www.aosmd.com page 2 of 6
AO4402 typical electrical and thermal characteristics 17 52 10 0 18 40 0 20 40 60 80 0.5 1 1.5 2 2.5 v gs (volts) figure 2: transfer characteristics (note e) i d (a) 0 2 4 6 8 10 0 5 10 15 20 25 30 i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) r ds(on) (m w ww w ) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 v sd (volts) figure 6: body-diode characteristics (note e) i s (a) 0.8 1 1.2 1.4 0 25 50 75 100 125 150 175 temperature (c) figure 4: on-resistance vs. junction temperature (note e) normalized on-resistance 3 4 5 6 7 8 9 10 0 2 4 6 8 v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) r ds(on) (m w ww w ) 25c 125c v ds =5v v gs =2.5v v gs =4.5v i d =20a 25c 125c 0 20 40 60 80 100 0 1 2 3 4 5 v ds (volts) fig 1: on-region characteristics (note e) i d (a) rev 1: nov 2010 www.aosmd.com page 3 of 6
AO4402 typical electrical and thermal characteristics 0 2 4 6 8 10 0 20 40 60 80 100 q g (nc) figure 7: gate-charge characteristics v gs (volts) 0 1000 2000 3000 4000 5000 6000 7000 0 5 10 15 20 v ds (volts) figure 8: capacitance characteristics capacitance (pf) c oss c rss v ds =10v i d =20a 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 pulse width (s) figure 11: single pulse power rating junction-to-am bient (note f) power (w) t a =25c 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 v ds (volts) i d (amps) 10ms 10.0 100.0 1000.0 1 10 100 1000 time in avalanche, t a ( m mm m s) figure 9: single pulse avalanche capability (note c) i ar (a) peak avalanche current rev 1: nov 2010 www.aosmd.com page 4 of 6
AO4402 typical electrical and thermal characteristics 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 12: normalized maximum transient thermal imp edance (note f) z q qq q ja normalized transient thermal resistance single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse r q ja =75c/w rev 1: nov 2010 www.aosmd.com page 5 of 6
AO4402 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt ar ar t rr rev 1: nov 2010 www.aosmd.com page 6 of 6
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